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Get Started with VHDP

Software Setup#

Use the benefits of code suggestions and vendor-independent libraries by using VHDPlus IDE, the easiest way to program your FPGA.

Install VHDPlus IDE#

  1. Download MAX 10 device support¹
  2. Download and install Quartus Prime Lite for Windows²
  3. Download and install VHDPlus IDE

¹MAX 10 device support:
The VHDPlus Core is equipped with a MAX 10 FPGA. Select the device family depending on your development board.

²Quartus Prime:
Quartus Prime is necessary for compiling your code and programming your FPGA.


You need to install the drivers according to your programmer at hand in order to program your FPGA. Our VHDPlus Core features an ARROW USB Programmer because of its additional USB to UART interface.

Follow this guide to download and install the driver for the Arrow USB Programmer.

Connect VHDPlus IDE with Quartus#

For direct compiling and programming of VHDPlus IDE a connection via Quartus is necessary. If Quartus is installed in default directory no further steps are needed. Otherwise an adjustment of the Quartus' path can be realized by opening the VHDPlus IDE and navigating throughExtras -> Options -> General

Select Quartus Path

When Quartus is detected successfully the boundary turns green.

Simulation with GHDL#

Using the new Package Manager (recommended)#

  1. Open the Package Manager Extras -> Package Manager
  2. Install GHDL and GTKWave and wait for them to finish

Manual installation#

  1. Download and Install GHDL
  2. Download an extract GTK Wave
  3. Specify the path for GHDL and GTKWave executables in Extras -> Settings -> Simulator

Learn more about simulation with GHDL here

Simulation with ModelSim#

  1. Download and install ModelSim or ModelSim for Linux
  2. Specify the path for the modelsim_ase folder in Extras -> Settings -> Simulator
  3. Run the simulation in the GHDP viewer or with a right click on a VHDL file

Learn more about simulation with ModelSim here

Program with VHDP#

⚠️ At this point the VHDP language has not left WIP state. Breaking changes might occur until version 1.0.**

Click here to see the full documentation of the language VHDP. You have the choise between a written documentation and a video series.

Here is a first tutorial on how to create a simple Blink program:

Create your first program:#

MAX10 Device Support, Quartus and the Arrow Programmer Driver are required for this.

  1. Start VHDPlus IDE and create a new project (top left).
  2. Inside the vhdp file you can write your code. This is a simple blink example:
Blink example
--I/Os of the FPGA
LED : OUT STD_LOGIC := '0'; --STD_LOGIC contains states like '1', '0' or 'Z' for High Impedance
Process Demo ()
Thread --Every Thread is an endless loop
LED <= '1';
LED <= '0';
  1. To test your code click on create (grey hammer). For the example code with Core MAX10:
  • Click on the red LED in the right drawing of the Core MAX10
  • Click on "LED" in the "Unconnected" list and hit Enter
  • Do the same for CLK that is located right next to the FPGA chip
  • Click on Compile
  1. Compiling can last up to several minutes, because the compiler attempts to find the most efficient way to connect the logic elements. To program the FPGA, connect the FPGA with an USB cable and click on Program (blue arrow). To save the program on the FPGA, select Extras/Long-Term Programming.

Comparison between Arduino (C++), VHDP and VHDL#

If you are familiar with software or hardware programming, check out this comparison here.

Use other HDL files and IP Cores#

If you are not new to FPGAs and want to profit from VHDP while still using your old code and IP Cores, check out this tutorial. (If you don't have a VHDP file with a Main(), the Verilog or VHDL file with the name of the project is the top entity)

VHDL with the VHDPlus IDE#

Verilog with the VHDPlus IDE#


Check out what other people have done with VHDP. Here is a list of tutorials from us:

  1. Smart route following robot
  2. Camera with Object Detection
  3. LED Matrix
  4. Spectrum Analyzer

You can find much more examples here.

Last updated on by Hendrik Mennen