Everything in One

Program, Simulate and Debug
FPGAs or Processors on Your FPGA

High Compatibility

Use the IDE to Program Our Language VHDP,
VHDL, Verilog or other Languages

Easy to Use

Benefit from Simple Syntax, Clean IDE
and a Variety of Tutorials

Code Assistant

VHDPlus IDE makes writing code as easy as possible. Multiple Features like code suggestions, autocorrection and error listing work together to help you program your FPGA.

Code Assistant

VHDPlus IDE makes writing code as easy as possible. Multiple Features like code suggestions, autocorrection and error listing work together to help you program your FPGA.

Simulation Assistant

If you ever tried programming FPGAs you probably noticed that the HDL Synthesis takes very long once your project extends. Instead of using trial & error you can simulate your Program to fix mistakes.

Seamless Quartus Integration

Connect pins, compile and program directly from our IDE. All important features of Quartus are built-in and ready to use in VHDPlus IDE. Now available on Linux and Windows.

Software Support

For some applications using an FPGA can have disadvantages. In this case you can use the NIOS II Softcore processor and program it like an Arduino. VHDPlus IDE offers first class C++ support including a debugger.

What is an FPGA?

FPGAs complete operations at astonishing rates. They are not limited by thread count, because you program the hardware. This leads to incomparable performance, especially in multi-threaded tasks, such as for robots, AI, audio and video processing or Crypto mining.

This is why FPGAs are already widely used in the professional environment. But due to the high price and difficulty of programming for private users, FPGAs have not yet been established. This is why we started this project.

I/O Blocks

Connections

Logik Blocks

What is VHDPlus?

VHDPlus is the name for a combination of different solutions we came up with to make FPGA Programming a lot easier.

VHDPlus IDE 💡

VHDPlus IDE is a modern approach to make FPGA Programming faster and more beginner friendly.

VHDP Language 📑

VHDP is a superset of VHDL, which makes Programming easier by extending its features and simplifying syntax.

Plug&Play Hardware ⚡

The VHDPlus IDE supports the open CRUVI Standard. Modular CRUVI hardware and the visual integration in the IDE create a true Plug&Play experiance.

VHDPlus Learning Platform 📚

We offer a lot of Examples and Guides for free on our Website, which we are expanding continuously.

VHDP Programming Language

By automatically creating state machines, including synthesizable loops, delays, and functions, and due to a much simpler syntax, you can experience up to 95% code reduction at 100% of the performance!

VHDP is not a completely different language, but it extends the features of VHDL. So everything you could do with VHDL is also possible with VHDP. Nevertheless, you can program with the IDE in almost every HDL language and add code from different languages. Feel free to convice yourself!

100% Compatibility to classic HDLs ✔
Automatic State machines ✔
Simple Syntax ✔
Full FPGA Performance ✔

Compare VHDP to VHDL

Blink

VHDP
VHDL
VERILOG

Main
(
    led : OUT STD_LOGIC := '0'; --Output signal
)
{ 
    Process() --Infinite loop
    {
        Thread --Automatic state machine
        {
            led <= '0'; --turn LED on
            Wait(250ms); --Wait for 250ms
            led <= '1'; --turn LED off
            Wait(250ms); --Wait for 250ms
        }
    }
}

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
  
entity FirstProjectVHDL is
    port(
        CLK : in     std_logic;
        LED : buffer std_logic := '0'
    );
end entity FirstProjectVHDL;

architecture rtl of FirstProjectVHDL is
    signal counter : integer range 0 to 1000000 := 0;
begin
  
    blink: process(clk)
    begin
        if rising_edge(clk) then
            if counter < 1000000 then
                counter <= counter + 1;
            else
                counter <= 0;
                LED     <= NOT LED;
            end if;
        end if;
    end process blink;
  
end architecture rtl;

module blink (clk, LED);

input clk;
output LED;
  
reg [31:0] counter;
reg LED_status;
  
initial begin
    counter <= 32'b0;
    LED_status <= 1'b0;
end
  
always @ (posedge clk) 
begin
    counter <= counter + 1'b1;
    if (counter > 1000000)
    begin
        LED_status <= !LED_status;
        counter <= 32'b0;
    end
end
  
assign LED = LED_status;
  
endmodule 

CRUVI Hardware

With our partner Trenz Electronic, we can offer professional grade hardware designed for inexperienced users and professionals. One board for all your projects, faster than processors and the perfect companion for the VHDPlus IDE.

VHDPlus IDE Integration ✔
On-Board Programmer ✔
Plug&Play experience ✔

Components Overview More CRUVI Hardware

Tutorials

Interested but don't know how to start? Check out our documentation and example projects! Learn how to program your robot and make it yours. Do projects you may not have thought of while working with microcontrollers!

You don't like to read? Then try our video tutorials in which you can learn all important features of our IDE. From simple blink tutorials to implementing processors and programming them with Arduino - there is something for everybody.

Make sure to subscribe so you don't miss any new videos ❤

Example Projects Youtube Channel