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Connections

Definition​

Connections can be used to help with connecting the Component I/Os with the correct FPGA I/Os. If there are I/Os in Main with the same name that aren't already connected, they will be connected automatically with the given FPGA Pins.

Example​

Connections
{
    RX => D5;
    TX => F4;
}

CRUVI​

To connect CRUVI extensions for every development board use these names as pins:

LS_1-8 (1 SDA, 2 SCL, 3 D3, 4 SEL, 5 D2, 6 D1, 7 CLK, 8 D0)

HS_Dif_1-24 (1 B0_P, 2 B0_N, ..., 13 A0_P, 14 A0_N, ...)
HS_Ale (SMD_Alert)
HS_SDA (SMD_SDA)
HS_SCL (SMD_SCL)
HS_Ref (REFCLK)
HS_HSM (HSMIO)
HS_HSO (HSO)
HS_HSR (HSRST)
HS_HSI (HSI)
HS_Low_1-5 (1 DI, 2 DO, 3 SEL, 4 TMODE, 5 SCK)

PMOD​

To connect PMOD extensions for every development board use these names as pins:

PMOD_1-8 (Pin 1-4 on top and 7-10 on bottom)

Onboard Hardware​

SDRAM:
SDRAM_ADD_1-13 (Address)
SDRAM_BAN_1-2 (Bank Select)
SDRAM_CAS (Column Address Strobe)
SDRAM_CLK (Clock)
SDRAM_CKE (Clock Enable)
SDRAM_RAS (Row Address Strobe)
SDRAM_WEN (Write Enable)
SDRAM_CSE (Chip Select)
SDRAM_DQM_1-2 (I/O Mask)
SDRAM_DAT_1-16 (Data)

SPI Flash:
Flash_1-6 (1 CLK, 2 MISO, 3 MOSI, 4 SS, 5 NSTATUS, 6 DEVCLRN)

USB to Serial:
UART_RXD
UART_TXD
UART_RTS
UART_CTS
UART_DTR
UART_DSR

LED:
LED_1-... (Depending on LEDs available)

Button:
BTN_1-... (Depending on buttons available)

ADC:
ADC_1-... (Depending on ADC inputs available)

Clock:
CLK

SPI Accelerometer:
ACCEL_1-6 (1 SPC, 2 SDO, 3 SDI, 4 CS, 5 INT1, 6 INT2)